In semiconductor integrated circuit, as the scale of integration increases, it is important to find new ways to reduce the area occupied by circuits while satisfying ever increasing demands for higher speed and lower power consumption.
For the majority of semiconductor integrated circuits produced today, transistors are fabricated within wells formed in a bulk semiconductor substrate. This method of fabrication places the following limitations, among others, on the integrated circuits produced therefrom: the area of substrate occupied by the transistor is not less than minimum lithographic dimensions; the width to length (W/L) ratio of the transistor is not greater than the dimensions defined in the plane of the substrate; and contact studs and metallization at a separate level are necessary to make a connection between each transistor and any other transistor.
Accordingly, it is an object of the invention to provide an apparatus including an active device formed in a substantially continuous mesa region of semiconductor material formed on one or more sides of an isolation region, in which the apparatus includes a conductive path formed in the mesa region which extends in a linear direction of the mesa region.
Accordingly, it is an object of the present invention to provide semiconductor integrated circuits in which active devices such as transistors therein have a W/L ratio which is controllable independently from the dimensions that the active devices extend in the plane of the substrate.
It is another object of the invention to provide integrated circuits in which multiple active devices are self-linked, i.e. do not require separate level metallization for linking.
Still another object of the invention is to provide integrated circuits which occupy very little area of the substrate as gauged by minimum lithographic dimensions.